General Purpose Processors Software-Basic Architecture

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Introduction

  • The designer of a general-purpose processor, or microprocessor, builds a variety of applications.
  • An embedded system designer simply uses a general-purpose processor, by programming the processor’s memory to carry out the required functionality.
  • This part of an implementation is known as software.
  • Using a general-purpose processor in an embedded system results in several design metric benefits. This part of an implementation is known as software.
  • Using a general-purpose processor in an embedded system results in several design metric benefits.

Basic architecture

  • A general-purpose processor, sometimes called a CPU  or a microprocessor, consists of a datapath and a controller, tightly linked with a memory.
  • The figure shows the Basic Architecture of a processor.

    Datapath

  • The datapath consists of the circuitry for transforming data and for storing temporary data.
  • The datapath contains an arithmetic-logic unit (ALU) capable of transforming data through operations such as addition, subtraction, logical AND, logical OR, inverting, and shifting.
  • The ALU also generates status signals, often stored in a status register.
  • The datapath also contains registers capable of storing temporary data.
  • Temporary data may include data brought in from memory but not yet sent through the ALU.
  • data coming from the ALU that will be needed for later ALU operations or will be sent back to memory.
  • The internal data bus is the bus over which data travels within the datapath.
  • While the external data bus is the bus over which data is brought to and from the data memory.

Controller

  • The controller consists of circuitry for retrieving program instructions, and for moving data to, from, and through the datapath according to those instructions.
  • The controller contains a program counter (PC) that holds the address of the next instruction.
  • The controller also contains an instruction register (IR) to hold the fetched instruction.
  • Based on this instruction, the controller’s control logic generates the appropriate signals to control the flow of data in the datapath.
  • Storing ALU results into a particular register, or moving data between memory and a register.
  • Finally, the next-state logic determines the next value of the PC.
  • For a non-branch instruction, this logic increments the PC.
  • For a branch instruction, this logic looks at the datapath status signals and the IR to determine the appropriate next address.
  • The PC’s bit-width represents the processor’s address size.
  • The address size is independent of the data word size; the address size is often larger.
  • The address size determines the number of directly accessible memory locations, referred to as the address space or memory space.
  • If the address size is M, then the address space is 2^M.
  • For each instruction, The controller typically sequences through several stages.
  • Such as fetching the instruction from memory, decoding it, fetching operands, executing the instruction in the datapath, and storing results.
  • Each stage may consist of one or more clock cycles. A clock cycle is usually the longest time required for data to travel from one register to another.
  • The path through the datapath or controller that results in this longest time is called the critical path.
  • The inverse of the clock cycle is the clock frequency.
  • The shorter the critical path, the higher the clock frequency.
  • Clock frequency is being used as one of the measures of comparing processors.
  • If clock frequency is higher program execution is faster.

Memory

  • Registers serve a processor’s short term storage requirements.
  • Memory serves the processor’s medium and long-term information-storage requirements.
  • We can classify stored information as either program or data.
  • Program information consists of the sequence of instructions that cause the processor to carry out the desired system functionality.
  • Data information represents the values being input, output and transformed by the program.
  • We can store program and data together or separately.
  • In a Princeton architecture, data and program words share the same memory space.
  • In a Harvard architecture, the program memory space is distinct from the data memory space.
  • Figure 2.2 illustrates these two methods.

  • The Princeton architecture may result in a simpler hardware connection to memory, since only one connection is necessary.
  • A Harvard architecture, while requiring two connections, can perform instruction and data fetches simultaneously, so may result in improved performance.
  • Most machines have a Princeton architecture.
  • The Intel 8051 is a well-known Harvard architecture.
  • Memory may be read-only memory (ROM) or readable and writable memory (RAM).
  • ROM is usually much more compact than RAM.
  • An embedded system often uses ROM for program memory.
  • Unlike in desktop systems, an embedded system’s program does not change.
  • Memory may be on-chip or off-chip.
  • On-chip memory resides on the same IC as the processor, while off-chip memory resides on a separate IC.
  • The processor can usually access on-chip memory must faster than off-chip memory.

Cache Memory

  • To reduce the time needed to access (read or write) memory, a local copy of memory may be kept in a fast memory called cache, as illustrated in Figure 2.3.
  • Cache memory often resides on-chip, and often uses fast and expensive static RAM technology.

 

  • In Cache memory processor stores location of its neighbors’ to access a particular memory location.
  • If the copy does reside in cache, it’s a cache hit.
  • If the copy does not reside in cache its a cache miss.
  • For intelligent caching schemes, the ratio of cache hit/cache miss must be very high.
  • Caches are used for both program memory (often called instruction cache, or I-cache) as well as data memory (often called D-cache)

Author: Lakshmi Prasanna Ponnala

Completed M.Tech in Digital Electronics and Communication Systems.

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